
Cadence Design Systems Inc. has teamed with Coventor Inc. on what the pair says is the first environment to allow 3-D microelectromechanical system (MEMS) models to be designed and simulated in tandem with CMOS integrated circuitry. Traditionally, MEMS chip design requires a separate design effort for a CMOS application-specific integrated circuit (ASIC). Now MEMS structures can be designed using a 3-D computer-aided design (CAD) system, then automatically tranfered to Cadence's Virtuoso Schematic Editor, enabling full co-simulation and co-verification.
Text: http://www.eetimes.com/showArticle.jhtml?articleID=217500355