A process used to create the world's first inexpensive transparent circuitry based on inorganic materials could enable a new era of electronics. The circuit--a five-inverter ring oscillator cast in amorphous indium gallium oxide--was recently demonstrated here at Oregon State University. The transparent circuits could be "embossed" on virtually any surface, from "smart glass"--displays with integrated computers in a "windshield"--to ultraefficient solar-cell "coatings" painted onto an electric car. Since the process is inorganic, it promises superior performance compared with organic transparent circuits. The inorganic circuits show higher electron mobility, higher chemical stability and higher physical durability, but use only low-temperature fabrication that rivals those of conductive polymers. Today, most research into transparent electronics centers on organic conductive polymers, which are very inexpensive to manufacture and which, unlike silicon circuitry, only require low temperatures for fabrication.
Text: http://www.eetimes.com/showArticle.jhtml?articleID=183701149
Monday, March 27, 2006
"CHIPS: Molecular Imprints adds apps, clients for step-and-flash litho"
Since netting the 2005 EE Times ACE Award for Most Promising New Technology, Molecular Imprints Inc. has garnered support for its groundbreaking step-and-flash imprint lithography (S-FIL) among its peers, its expanding customer base and its funding sources. It has also pioneered two applications for the technology--solid-state lights and hard disks--and has demonstrated how CMOS chip makers can get to the 32-nanometer node more easily with step-and-flash imprint lithography. Step-and-flash imprint lithography is based on the ancient art of embossing, adapting the technique for nanoscale patterning of semiconductor wafers. A circuit pattern is embossed into a silicon dioxide (silica) "stamp," which is then stepped and pressed into a prepared layer on a silicon substrate. Illumination by an ultraviolet flash hardens the layer into the nanoscale circuit pattern, which then can be fabricated into devices using conventional CMOS etching and deposition. Since receiving its ACE Award last March, Molecular Imprints has landed $17 million in further financing, bringing the total to $60 million since its founding in 2001. The company has also expanded by 10 employees, bringing its head count to 80, and has snagged a new vice president of marketing from a traditional lithography house, ASML. Molecular Imprints also filed its 300th patent application and had its 40th patent granted in the year since it won the award. From a technological standpoint, Molecular Imprints has charted progress by being able to demonstrate 25-nanometer features on contacts and posts.
Text: http://www.eetimes.com/showArticle.jhtml?articleID=183701973
Text: http://www.eetimes.com/showArticle.jhtml?articleID=183701973
"SENSORS: Sensor-packed bumpers found at car lot near you"
The software for self-driving cars, or even for full collision-avoidance systems, may be years away, but the sensors are already here. Today automobiles are studded with sensors. Analysts predict that collision avoidance will be the feature that propels electronic-sensor systems into new automobiles. Currently, Mercedes-Benz S-class vehicles are equipped with 24-GHz radar that can provide emergency braking when accidents become inevitable. In addition, radar-based adaptive cruise control is found in the BMW 3 series, the Volkswagen Passat, several Mitsubishi models, and Mercedes-Benz and Toyota cars. The next applications of sensors and video cameras, according to Frost & Sullivan, will be object-classification services that warn of vehicles in the driver's blind spot and accidental lane departures, and that provide heads-up night vision.
Text: http://www.eetimes.com/showArticle.jhtml?articleID=183702408
Text: http://www.eetimes.com/showArticle.jhtml?articleID=183702408
"ALGORITHMS: City driving is next for Darpa"
After decades of underachieving, artificial intelligence produced self-driving cars last October, when five autonomous vehicles successfully finished Darpa's Grand Challenge, a 132-mile closed course through open desert (search www.eetimes. com, article ID 172301198). In the prior year's race, every entrant had either stalled or crashed within seven miles. The winner was a Stanford University team's souped-up Volkswagen Touareg called Stanley. The team garnered a $2 million cash prize, which it plans to split between an enduring fellowship and a fleet of new autonomous vehicles. The next goal: city driving. Darpa is in the planning stages of a follow-on to its Grand Challenge, unofficially called the "Urban Challenge."
Text: http://www.eetimes.com/showArticle.jhtml?articleID=183702603
Text: http://www.eetimes.com/showArticle.jhtml?articleID=183702603
"CHIPS: Single-molecule nanotube oscillator ripe for CMOS"
IBM Corp.'s T.J. Watson Research Center has crafted an experimental IC that uses a single-molecule nanotube as the common transistor channel for five CMOS-like inverters wired as a ring oscillator. The fully integrated device, which reportedly runs 400,000 times faster than the fastest nanotube-based circuits developed at other labs, could serve as a blueprint for integrating nanotube transistors into production CMOS chips. Experimental methods of adding nanotube-based transistors to standard CMOS circuits have been tried at IBM and elsewhere, but all have had to fall back on manual manipulations with an atomic-force microscope or have had to resort to exotic processing steps. But the new work demonstrates that fully integrated circuits are possible by growing nanotubes in place on a standard silicon substrate and then adding metallization layers using standard photolithographic techniques. It also demonstrates that standard CMOS circuitry can be crafted with the nanotube serving as the channel for both p-and n-type transistors. The work builds on an achievement declared in 2001, when IBM demonstrated the use of nanotubes to enable a transistor channel measuring 15 angstroms (1.5 nanometers)--over 40 times smaller than the tiniest features on today's state-of-the-art 65-nm silicon ICs. Using single-molecule nanotubes for each device on future ICs could simplify manufacturing and provide the kind of rigorous consistency needed to adapt commercial CMOS processes for use with carbon nanotube transistors
Text: http://www.eetimes.com/showArticle.jhtml?articleID=183702706
Text: http://www.eetimes.com/showArticle.jhtml?articleID=183702706
"ALGORITHMS: Next-generation vehicles: drivers optional"
The team behind Stanley, the car that won the Defense Advanced Research Projects Agency's 2005 autonomous-vehicle race over 132 miles of Nevada desert, is at it again. By 2008, the Stanford University group will be steering its self-driving car onto the interstate. The journey will take seven hours and will involve all types of traffic conditions, from urban driving to congested highways to very long traverses of interstates. Can your car drive itself too? Semiconductor designers, automotive engineers, and software and middleware experts all say the answer is yes, and that cars that drive themselves will be a market reality at some point in the not-too-distant future.
Text: http://www.eetimes.com/showArticle.jhtml?articleID=183702695
Text: http://www.eetimes.com/showArticle.jhtml?articleID=183702695
Monday, March 13, 2006
"CHIPS: Defects dodged at nanoscale"
Defects in fabrication and errors during operation will become a fact of life for electronic circuits at the nanoscale. To compensate, researchers are crafting schemes to correct fabrication defects and processing errors on the fly. Georgia Institute of Technology, with funding from Intel Corp., is pioneering probabilistic CMOS to trade off processing errors for cooler running temperatures. And Hewlett-Packard Co. recently demonstrated a chip that uses massive redundancy and automatic recovery to compensate for fabrication errors in a 100-Gbit/cm2 nanowire storage array. Hewlett-Packard's current demonstration used nanoimprint lithography to fabricate 15-nanometer-wide wires with just 19 nm between their edges. Using a superlattice-pattern transfer technique, the researchers fabricated a 300-layer GaAs/AlGaAs array of 150 silicon nanowires with just a 34-nm pitch. By using the same imprinting mold to pattern a second array of identical nanowires above the first set, but at a 90° angle, they produced a platinum nanowire crossbar switch with a cell density of 100 Gbits/cm2. HP worked around the inevitable fabrication errors inherent in such high-density circuitry by using 50 percent redundancy and an automatic demultiplexer algorithm drawn from coding theory to reroute defective connections. Using a code similar to those in digital cell phone systems, the demultiplexer for the incredibly dense crossbar array was able to route around inevitable defects. HP predicts that circuit densities will necessitate the use of its scheme for chips produced in about six to seven years' time. Instead of correcting errors with redundancy, Georgia Institute of Technology researchers, with funding from Intel and the Defense Advanced Research Projects Agency, propose harnessing errors to lower chip temperatures. Called probabilistic CMOS (PCMOS) it can achieve valid results with far less energy than traditional logic. The new approach is particularly suited to a growing body of algorithms that use probability as a computational component.
Text: http://www.eetimes.com/showArticle.jhtml?articleID=181501772
Text: http://www.eetimes.com/showArticle.jhtml?articleID=181501772
Monday, March 06, 2006
"NANOTECH: IBM fellow unrolls blueprint for nano"
Phaedon Avouris, an IBM fellow and manager of the Nanometer Scale Science and Technology program at IBM's T.J. Watson Research Center, is in the vanguard of experimental and theoretical research into the electrical properties and transport mechanisms of carbon nanotubes and other nanostructures. A comprehensive model of nanotube behavior used by Avouris and colleagues at IBM might serve as a blueprint for the design and fabrication of carbon-nanotube-based electronic devices and circuits. Avouris talked to EE Times' R. Colin Johnson about the surprising operating regions available to designers of carbon nanotube transistors for specific applications.
Text: http://www.eetimes.com/showArticle.jhtml?articleID=181500304
Text: http://www.eetimes.com/showArticle.jhtml?articleID=181500304
"QUANTUM: Models demystify quantum-dot Babel"
Physicists have been predicting that interactions between quantum dots could prove just as dissipative as electronic communications on silicon chips, for the same reason: the randomness of multiple-electron behavior. But a team at Ohio University asserts that, given the appropriate environmental conditions, communications among arrays of semiconducting quantum dots can be coherent. If the researchers' computer simulations are proved correct though subsequent experiments in the physical realm, the finding could open the door to complex quantum computers built from arrays of quantum dots, according to Ohio University professor Sergio Ulloa. Ulloa and Ohio doctoral candidate Ameenah Al-Ahmadi have worked exclusively with computer simulations, a condition that has let them ignore the extraneous physical factors that Ulloa believes have hidden the essentially coherent nature of quantum-dot interactions. Ulloa is leaving it to others to prove out the prediction with follow-up experiments. A group "here at Ohio University is planning to demonstrate our results experimentally," he said. He added that its results are expected within the next few months. If the simulations prove out, Ulloa said, basic design principles could be disseminated to EEs looking to craft quantum-computer components.
Text: http://www.eetimes.com/showArticle.jhtml?articleID=181401323
Text: http://www.eetimes.com/showArticle.jhtml?articleID=181401323
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