Thursday, January 31, 2013

#ALGORITHMS: "IBM Sends Watson to College"

IBM's Watson cluster supercomputer has already conquered the game-show Jeopardy by beating the human champions, has already advising doctors for more accurate diagnoses and is advising traders on which stocks to pick--all that without going to college. However, now that Watson has enrolled in the Rensselaer Polytechnic Institute (RPI) researchers there promise to expand its field of applications as well as teach how to do "deeper thinking" than it does today: R. Colin Johnson @NextGenLog

A more general-purpose version of IBM's artificially intelligent (AI) cluster supercomputer called Watson will be be installed at Rensselaer Polytechnic Institute, where it will be used by researchers there to deepen the AI's cognitive abilities as well as to explore new application areas.
Further Reading

#CHIPS: "Parallel Processor Now Rule, Rather than Exception"

Parallel processors were once exotic hardware programmed only by the most elite software gurus using black magic conjured from decades of experience. Today, however, almost all new microprocessors are multi-core, and parallel programming techniques are now in the toolkit of every working programmer. Intel, for instance, now has four lines of processors--Atom, Core, Xeon and Xeon Phi--all of which have multiple cores that excel at parallel processing: R. Colin Johnson @NextGenLog

All of Intel's modern processor families today are parallel processors, from the tiny low-power Atom to mainstay Core i3, i5 and i7, to the Xeon for servers and the many-integrated-core (MIC) Xeon Phi coprocessor.
Further Reading

Wednesday, January 30, 2013

#ENERGY: "TI Unveils New Smart Grid SoCs"

Texas Instruments (TI) has unveiled dozens of new smart meter systems-on-chip (SoCs) for the burgeoning market for upgrading the power grids worldwide. Smart grids will cut energy consumption by matching usage patterns to electricity generation capabilities, but needs smart meters to work--and TI has an SoC for every smart grid app: R. Colin Johnson @NextGenLog

TI's smart grid SoCs, software and reference designs enable in-home displays to equip consumers with information that enables them to control of their energy usage.
Further Reading

Tuesday, January 29, 2013

#CHIPS: "E.U.'s $2B Emerging Technologies initiative"

The European Union has funded a 10-year $2 billion Future and Emerging Technologies initiative that will develop microchips modeled on the human brain--the Human Brain Project--as well as graphene semiconductors aiming to replace silicon--the Graphene Flagship project. The long-range research will coordinate hundreds of European researchers and academic institutions toward the common goals of brain-like computers using lightweight super-fast carbon-based circuitry: R. Colin Johnson @NextGenLog
Further Reading

#CHIPS: "Water Cooled Supercomputers Proliferate in Russia"

Russia is trying to catch up in supercomputing by adopting the water-cooling technique invented by the RSC Group (Moscow), which is current installing Intel Xeon Phi accelerated supercomputers at the Russian Academy of Sciences, the South Ural State University (SUSU), the Moscow Institute of Physics and Technology (MIPT) and the Russian Federal Service for Hydrometerorology and Environmental Monitoring: R. Colin Johnson @NextGenLog

Further Reading

Monday, January 28, 2013

#CHIPS: "Broadcom Cements Lead in Network Switches"

Broadcom claims that 99.98 percent of all network data traffic crosses one of its chips, but its aim is 100 percent with its new portfolio of switch system-on-chips (SoCs) which provide gigabit performance for every network level--from the wiring closet to the datacenter: R. Colin Johnson @NextGenLog

Broadcom offers smart switching system-on-chip (SoC) solutions for every level of networking--from the wiring closet to the enterprise datacenter.
Further Reading

#CHIPS: "Russia Adopts Intel's Xeon-Phi Supercomputer"

Russia may not be allowing the U.S. to adopt its babies anymore, but it is allowing its fledgling supercomputer facilities to adopt Intel's Xeon Phi. The Russian Academy of Science, for instance, is planning a 10 petaFLOPS supercomputer using Xeon Phi cores, ramping up from its 580 teraFLOP prototype today: R. Colin Johnson @NextGenLog

RSC'S Tornado architecture provides direct liquid cooling to the Xeon and Xeon Phi processors (bottom) enabling the Russian Joint Supercomputer Center to lay claim to the world's densest array of parallel processors. SOURCE: RSC
Further Reading

#DESIGNCON: "Behavioral Modeling Streamlines Analog Design"

Behavioral modeling allows engineers to streamline their design flow by mixing up device-level and high-level simulations, using the former for critical loops and the latter to speed-up the development effort: R. Colin Johnson @NextGenLog

Spice and Verilog simulators uncover timing skews at both the block and chip levels.
Source: Synopsys Inc.

Learn all the ins and outs of behavioral modeling at DesignCon 2013 in the session Behavioral Modeling for Analog, Mixed-Signal, and RF: What is the Best Approach Today? on Tuesday, January 29, at 3:45 in Ballroom E.
Further Reading

Friday, January 25, 2013

#SENSORS: " Brain Cap Reads Minds"

Controlling a computer, automated wheelchair or an electronic prosthetic with your thoughts is being accomplished in the Tools for Brain‐computer Interaction (TOBI) project at The École Polytechnique Fédérale de Lausanne (EPFL, Switzerland). Over 100 paralyzed patients have learned how to control electronics--including a remote-controlled robot--with nothing but their mind. And by combining electrical stimulation with mental training, patients have regained functionality in paralyzed limbs: R. Colin Johnson @NextGenLog

Patients in the TOols for Brain‐computer Interaction (TOBI) program wear brain caps that readout their brain waves in order to control electronics at the École Polytechnique Fédérale de Lausanne (EPFL, Switzerland).
Further Reading

Thursday, January 24, 2013

#DESIGNCON: "Tricked-out interconnects boost signal integrity"

Behavioral modeling enables high-speed interconnect designers to have their cake and eat it too--that is, achieve ultra-stable signal integrity without repeated cycles of time-consuming physical modeling: R. Colin Johnson @NextGenLog

High-speed interconnects (top) can be modeled with RLC circuits (bottom) whose values can be tuned in order to debug and optimize circuit performance.
Further Reading

Wednesday, January 23, 2013

#MATERIALS: "Graphene Composite Generates/Harvests Energy"

Graphene is slated to take over from silicon when CMOS hits the end of the semiconductor roadmap circa 2020. By layering graphene with electro-active polymers, Duke University researcher hope to make it into an energy harvesting technology, that can also double as an electro-optical switch and as artificial muscles for robots: R. Colin Johnson @NextGenLog

Graphene crumples when compressed (shown here), but straightens back out when applying a voltage to the electro-active polymer to which it is attached, enabling a new electro-mechanical-optical material suitable for energy harvesting, optical switching and artificial muscles for robots. Source:Duke University
Further Reading

Tuesday, January 22, 2013

#OPTICS: "Intel's Silicon Photonics Supercharging Facebook"

Supercomputers have long used expensive Fibre Channel optical interconnects to allow its processors, networking and storage racks to be separated, but most datacenters have been shackled by copper interconnects that require processors, networking and storage modules to be present in each rack. Now Intel's ultra-cheap silicon photonics is allowing Facebook to build new data centers using optical interconnects that are are fast as a supercomputer, but as cheap as copper: R. Colin Johnson @NextGenLog

Intel's inexpensive silicon photonic devices allow tiny fiber optical cables to replace bulky expensive copper for interconnecting compute, storage and networking resources in the datacenter. SOURCE: Intel

Further Reading

Monday, January 21, 2013

#DESIGNCON: "RF Black Magic Speeds Digital Interfaces"

Radio frequency (RF) engineering has solved all the signal integrity problems that can occur at gigaHertz (GHz) speeds for TV, satellites and radar applications. And now that digital interfaces are ascending into the GHz speed realm, those waveguides, resonators, power dividers, antennas and other three-dimensional structures can be used to quell problems with digital transmission lines: R. Colin Johnson @NextGenLog

An RF filter that smoothes out ripple can be implemented as buried stripline on the printed circuit board where ground planes will contain the fields while impedance and routing length can be tightly controlled using "black magic" conjured for TV, satellite and radar applications.

Learn how to harness RF black-magic for your digital design in the DesignCon 2013 session Applying Microwave Techniques to Digital Systems on Tuesday, January 29 at the Santa Clara Convention Center.
Further Reading

Thursday, January 17, 2013

#CHIPS: "Embedded Switching to Intel Inside"

Intel claims that designers have begun switching to its Atom over ARM cores for their embedded designs, because of the extended battery life devices with Intel inside enjoy. To prove the point, Intel presented evidence that Motorola's Atom-powered RAZR smartphone has 18 percent longer battery life than the same phone with ARM inside: R. Colin Johnson @NextGenLOg

Vice president and GM of Intel’s Mobile and Communications Group, Mike Bell, claims the ecosystem of mobile devices running on Intel technology are outselling ARM if you include Intel's Atom for Windows 8 along with single, dual and quad-core Atom systems-on-chip (SoCs) processors running Google’s Android.
Further Reading

Wednesday, January 16, 2013

#3D: "Co-Design Key to Success"

3D semiconductors have special problems with overheating, making thermal co-design a must-have for the chip designer. Learn how to co-design 3D chips for thermal stability at DesignCon 2013: R. Colin Johnson @NextGenLOg

Temperature aware 3D-IC designs (left) represent device-layer power on a map of tiles (middle) each of which has its own temperature-dependent leakage profile (right).

Check out all the details of thermal co-design at DesignCon 2013 session Thermal Co-analysis of 3D-IC/Packages/System on Tuesday, Jan. 29 at 11:05 am at the Santa Clara Convention Center.
Further Reading

Tuesday, January 15, 2013

#CHIPS: "Memristors Emulate Brain's Learning"

Memristors were invented by IEEE Fellow Leon Chua as the 4th passive circuit element after resistors, capacitors and inductors. Designed to mimic the synapse between neurons in the brain, memristors are also revolutionizing the design of computers based on the human brain at HRL Labs: R. Colin Johnson @NextGenLog

HRL's memristor crossbar array fabricated atop a CMOS chip can store 10 Gbits per square centimeter. Source: HRL
Further Reading

Monday, January 14, 2013

#ALGORITHMS: "IBM/ST Collaborate on Shapsa Smart Home"

IBM has collaborated with STMicroelectronics to integrate its Home Gateway with home automation software from Shaspa all connected to IBM's cloud computers. Homeowners will be able to interact with their smart devices using voice recognition and physical gestures made almost anywhere in their home. ST's gateway connects televisions, computers, appliances, lights, heating, air-conditioning and security sensors that could top 8 billion devices by 2015...

The smart home of the future will enable hand gestures and voice recognition to control everything that has a manual button or dial today.
Further Reading

Friday, January 11, 2013

#DISPLAYS: "Kickstart the World's Thinnest Watch"

E-Ink's flexible zero-standy power display is being used in the world's thinnest watch, a sub-millimeter thick design that charges in just 10 minutes. Sign-up as a backer of this Kickstarter project by clicking Further Reading below, a creation of startup Central Standard Timing: R. Colin Johnson @NextGenLog

Using embedded Thinergy Micro-Energy Cell battery that charges in 10 minutes and lasts for over a month the 0.8mm thin watch has an expected lifetime of 15 years.
Further Reading

Thursday, January 10, 2013

#CHIPS: "Intel Aims to Beat ARM in Low-Power"

Intel already has the lion's share of the PC and servers markets, but now is aiming to conquer the mobile device market too by taking the low-power crown. Motorola recently proved its case by designing identical RAZR smartphones--one powered by Intel's Atom and one powered by and Qualcomm's Snapdragon licensed from ARM. The resulting Intel-powered smartphone had 18 percent longer battery life that the ARM-power smartphone--which Intel claims is a harbinger of a future where designers ditche ARM in favor of Atom...

Mike Bell, vice president and general manager of Intel’s Mobile and Communications Group shows the ecosystem of mobile devices running on Intel technology including Intel Atom processors running Windows 8 and Google’s Android with next-generation single, dual and quad-core Atom systems-on-chip (SoCs).
Further Reading

Wednesday, January 09, 2013

#CHIPS: "Verifying System-on-Chip (SoC) Easier from the Inside"

Designing, verifying and testing the chips that power today's mobile devices--systems-on-a-chip (SoC)--is extremely difficult using old-school test probes that can only reach the input/output ports of a chip. However, by embedding special test routines inside the chip to exercise its functions, design, verification and testing can be performed in simulation before prototyping, resulting in faster to market and more reliable designs...

Designers add a PCM (power control module) to handle powering-up/-down, saving/restoring states, and enabling/disabling isolated blocks on a modern SoC.
Learn inside-out testing techniques for SoCs at DesignCon 2013 session Meeting the Challenge of SoC Low-Power Verification on Wednesday, January 30 at 10:15 AM at the Santa Clara Convention Center, Ballroom B.
Further Reading

Tuesday, January 08, 2013

#MEMS: "Contextual Awareness—Next Big Thing?"

Smartphones, tablets, laptops and even power tools will all benefit from a new era of contextual-awareness technology enabled by single-chip inertial navigation units (INUs) the world's smallest of which was announced today at the Consumer Electronics Show (CES 2013, January 8-11, Las Vegas, Nev.): R. Colin Johnson @NextGenLog

Invensense's software development kit includes a pc board containing its nine-axis inertial navigation unit and MotionTracking software.
Further Reading

Monday, January 07, 2013

#MEMS: "Bosch satisfies consumer dream"

Future wearable electronics--from smart hearing aids to clothing that charges your batteries--will be enabled at the Consumer Electronics Show (CES) this week when the world's smallest three-axis accelerometer complements Bosch Sensortec's first nine-axis inertial measurement unit (IMU) running sensor fusion algorithms on an integrated 32-bit microcontroller: R. Colin Johnson @NextGenLog

Bosch's FusionLib software creates virtual sensors (center) for specific applications (right) by fusing the relevant data streams (left) from up to 10 sensors including a three-axis accelerometer, three-axis gyroscope, three-axis magnetometer and a barometric pressure sensor to measure altitude.
Further Reading

Wednesday, January 02, 2013

#DESIGNCON: "Silicon Interposer Enables 3-D Chip Stack"

Bridging the gap to three-dimensional (3-D) chips can be easier with a silicon interposer to handle the signal redistribution with through-silicon-viass that pack two orders of magnitude more interconnect than traditional planar packaging: R. Colin Johnson @NextGenLog
Rambus' 18-by-18 millimeter silicon interposer (top view) is designed for two die on top side-by-side and one die on the bottom interconnected by double-sided redistribution layers and through-silicon-vias with signal integrity up to 20GHz.
Further Reading