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Friday, March 30, 2007

"CHIPS: Cheaper avenue to 65 nm?"

Patterning 65-nanometer features on chips involves expensive techniques that have prompted leading chip makers like Texas Instruments to begin relying on foundries. Researchers at the Georgia Institute of Technology and spin-off company Focal Point Microsystems (Atlanta), now claim to have devised a cheaper, easier way to pattern at the 65-nm node. Called 3D multiphoton lithography, the technique still lacks the throughput needed by chip makers today. But within a few years, the researchers hope their process can be scaled down to lower nodes faster and more cheaply than the exponentially increasing cost of scaling down traditional lithography techniques.
Text: http://www.eetimes.com/showArticle.jhtml?articleID=198701422