"CHIPS: Unified transistor modeling on tap for IEDM"
A unified model for predicting the long-term reliability of semiconductors will be described next week at the 50th annual IEEE International Electron Devices Meeting. The technique, which simultaneously foretells negative-bias temperature instability and hot-carrier injection, could potentially save chip makers tens of millions of dollars annually. As nanoscale transistors shrink, the atomic-scale bonds that keep semiconductors reliable become fewer and fewer, making mean-time-to-failure predictions more important than ever. But to predict long-term reliability today, separate models must be maintained for the two primary causes of failure in semiconductors: negative-bias temperature instability (NBTI) and and hot-carrier injection (HCI). "Today, reliability is becoming much more important, because dimensions are getting so small," said Purdue University professor and semiconductor researcher Ashraf Alam, who will describe the details of a unified model at IEDM, to be held Dec. 13 to 15 in San Francisco (www.his.com/~iedm). "But only recently has reliability begun percolating into the design phase � rather than just being an afterthought. Our unified model will make it much easier for designers to measure reliability of new device architectures."