A self-assembling process promises to fits 10 terabits per square inch by harnessing nano-scale self-assembly of block co-polymer templates. The breakthrough overcomes previous obstacles with a two step process that first patterns sawtooth ridges on a sapphire wafer which is annealed, before patterning the three nanometer diameter memory domains.
BOTTOM LINE: Block copolymers are being investigated by many research labs as a method of patterning semiconductor chips at densities that go far beyond the capabilities of the photolithographic techniques used today. This type of maskless operation could be key to fabricating future memory chips, because the patterns self-assemble into regular patterns. However, this is only one piece of the puzzle--since it is unclear how to fabricate the circuitry to read, write and access such small memory domains--problems that could take a decade or more to solve.
