"CHIPS: IBM warns of 'design rule explosion' beyond 22-nm"

IBM warned of "design rule explosion" beyond the 22-nanometer node during a paper presentation earlier this month at the International Symposium on Physical Design (ISPD). Look for electronic design automation (EDA) tools to begin solve "design rule explosion" by 2012. R.C.J.


IBM described the physical design challenges beyond the 22-nm node, emphasizing that sub-wavelength lithography has made silicon image fidelity a serious challenge. Solving "design rule explosion," involves balancing area against image fidelity by considering the physical design needs at appropriate levels of abstraction, such as within cells. IBM gave examples of how restricted design rules could reap a three-fold improvement in variability with a small area penalty.

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