#CHIPS IBM spawning lower-power microprocessors

#SEMICONDUCTOR A design contest at the International Symposium on Physical Design (ISPD) is expected to spur new clock distribution schemes for microprocessors. Look for lower power clocks for the next generation of microprocessors at the 32 nanometer node and beyond. R.C.J.


A new suite of benchmarks released by IBM Research, in cooperation with Intel Research, will likely accelerate the development of robust new clock distribution schemes for next-generation microprocessors, according to the clock network synthesis contest organizers at the International Symposium on Physical Design (ISPD). The benchmarks were originally developed for ISPD's clock network synthesis design contest, which was won by professor Igor Markov's team from University of Michigan for the second straight year.
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