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Wednesday, February 28, 2007

"ALGORITHMS: EDA vendors unveil SoC design trimmers"

EDA vendors Synplicity, Novas Software and Cypress Semiconductor have introduced software tools aimed at streamlining the system-on-chip (SoC) design cycle and semiconductor verification process. The companies announced their products at the Globalpress Electronics Summit here Tuesday (Feb. 27).
Synplicity Inc. (Sunnyvale, Calif.) said its TotalRecall technology offers the debug visibility of a hardware emulator, but at speeds ranging from 10 to 100 times faster. Novas Software Inc. (San Jose, Calif.) introduced Replay, a visibility enhancement to its Siloti software suite, which the company claims adds timing-accurate simulation replay capabilities. And Cypress Semiconductor Corp. (San Jose) unveiled its CapSense software, which adds capacitive-sensing replacements to mechanical buttons for users of its Programmable System-on-Chip (PSoC) software tool.
Text: http://www.eetimes.com/showArticle.jhtml?articleID=197700121