#MATERIALS: "Graphene Rising to $1 Billion Market"

Carbon-based electronics will create a $1 billion market by the end of the decade, according to analysts. Nearly every electronics sector will be affected by the planar version of carbon--graphene--according to BCC Research (Wellesely, Mass.): R. Colin Johnson



Here is what BCC says about graphene: According to a new technical market research report from BCC Research (www.bccresearch.com), the global market for graphene-based products is projected to reach $122.9 million in 2017 and $986.7 million in 2022, increasing at a five-year compound annual growth rate (CAGR) of 51.7%.

The global graphene products market can be split into seven segments: capacitors, structural materials, high-performance computing, displays, photovoltaics, thermal management, and other graphene-based products.

The segment made up of capacitors is projected to be the largest segment in 2022. Capacitors are expected to increase from $31 million in value in 2017 to $410 million in 2022, a CAGR of 67.6%.

Structural materials are expected to jump from $44.5 million in 2017 to $167.6 million in 2022, a CAGR of 30.4%.

Together, the high-performance computing, displays, photovoltaics ,and thermal management segments should account for $44.4 million in 2017, and by 2022 these segments should collectively total $203.9 million, with high-performance computing having the largest CAGR of 40.1%.

Other graphene products, while expected to total only $3 million in 2017, are expected to rise at a CAGR of 132.8% and reach a value of $205.2 million in 2022.

Graphene is a one-atom-thick sheet of carbon whose strength, flexibility, and electrical conductivity have opened up new horizons for high-energy particle physics research and electronic, optical, and energy applications.

Potential electronics applications of graphene include ultrasmall transistors, superdense data storage, touch screens, and wearable electronics. In the energy field, potential applications include ultracapacitors to store and transmit electrical power, and highly-efficient solar cells.

Some researchers argue that graphene’s greatest potential lies in its ability to conduct light as well as electricity. They believe that graphene can improve the efficiency of light-emitting diodes (LEDs) and aid in the production of next-generation devices such as flexible touch screens, photodetectors, and ultrafast lasers.
Further Reading

#CHIPS: "Virtualized Symmetric Multiprocessing Eases MIC Transition"

Intel's 50+ core Xeon Phi will bring massive parallelism to the x86 platform, but requires an "off-load" programming model since the extra cores will be on a PCIe card. However, ScaleMP is working with Intel to ease that transition by virtualizing those cores with its vSMP. The extra bonus is that any missing instructions on the Xeon Phi will be emulated as well, so that code already written for any Xeon should run unaltered on the 50+ core Xeon Phi coprocessor: R. Colin Johnson


ScaleMP virtualizes dual Xeon E5-2600 processors with 128 Gbytes and a 50-core Xeon Phi coprocessor board with 8 Gbytes of memory, making it appear to programmers as a virtual SMP with a 66-core Xeon processor and 136 Gbytes of memory. Source: ScaleMP

Here is what Go-Parallel says about virtualized Xeon Phi cores: Programming multicore processors like the Xeon E5 for optimal performance isn’t easy, but because of the shared memory model, and hardware support for cache coherence, a little effort can go a long way toward harnessing multiple processors to accelerate applications. And with the help of the growing library of OpenMP algorithms that have already been optimized for multi-core acceleration, programmers are starting to see light at the end of multi-processing tunnel. At first glance, however, the new Intel Many Integrated Core (MIC) architecture for the forthcoming massively parallel Xeon Phi family would require a different style of programming. The exact same techniques cannot be used with the 50-core Xeon Phi, because it locates those extra cores on a PCIe coprocessor card. The Xeon E5 host processor shares its memory among eight on-chip cores, but not among the Xeon Phi cores, which have their own memory space. Programmers can just use the host Xeon E5 just for housekeeping, and load their parallelized algorithms into the Xeon Phi, but then their parallel algorithms are restricted to the memory available on the coprocessor card. Fortunately, there is a solution that lets programmers ease into the MIC architecture, and Intel is working with ScaleMP Inc. (Cupertino, Calif.) to make this transition (nearly) painless.
Further Reading

#CHIPS: "Sensor seeks to cut wafer cleaning costs"

Green semiconductor fabrication is the goal of the Semiconductor Research Corp. (SRC) which has found a way to add sensor to wafers that read-out whether it is clean or not. In between each process the wafer has to be cleaned of contaminants, but without sensors there is waste from overkill cleaning algorithms, but with a sensor wafers can save mucho energy and materials: R. Colin Johnson


Sensor channels measure the impedance of cleaning fluids in closed-loop process that stops cleaning when done rather than wasting resources. Source: SRC

Here is what EETimes says about putting cleaning sensors of wafers: Energy efficient semiconductor fabrication techniques have largely eluded designers of wafer cleaning processes, which still depend on open-loop recipes that waste energy and water. By closing the loop with on-wafer sensors, the Semiconductor Research Corp. (SRC, Research Triangle, N.C.) said it has developed a technology that saves as much as 80 percent of the water and energy required by traditional open-loop cleaning.
Further Reading

#CHIPS: "DOE Awards Intel $19 Million for Exascale by 2020"

Exascale computers 1000-times more powerful than the fastest petascale supercomputers today are needed for a variety of scientific, energy and military applications, according to the Department of Energy (DOE) which has awarded development contracts to AMD, EMC, HDF Group, Nvidia, and Whamcloud. The latest contract--$19 million to Intel--aims to capitalize on its latest massively parallel processors--the Many Integrated Core (MIC) Xeon Phi with over 50 integrated cores per chip: R. Colin Johnson


As the first member of its Many Integrated Core (MIC) architecture, Intel's Xeon Phi coprocessor board makes use of its 22-nanometer 3-D Tri-gate transistors. Source: Intel

The Department of Energy (DOE) announced a $19 million award to Intel Federal to develop exascale processors, next-generation memories, and ultra-fast input/output (I/O) technologies for Lawrence Livermore National Security’s (LLNS’s) Extreme-Scale Computing Research and Development “FastForward” program.

By enlisting broad cooperative contributions from industry, academia, and other national laboratories, DOE’s LLNS aims to develop all the necessary high-performance computing (HPC) capabilities needed to achieve exascale systems by 2020...Intel Federal’s twofold contract will apply the whole range of Intel’s capabilities, from basic research to development to prototyping to systems integration. Besides its MIC architecture and Xeon Phi massively parallel coprocessors, Intel also will enlist its 3-D memory technology developed with Micron Technology, called the Hybrid Memory Cube, as well as its high-speed interconnect technologies acquired earlier this year: Infiniband’s switched fabric network acquired from QLogic, and the Gemini interconnect technology acquired from Cray.
Further Reading

#DISPLAYS: "Startup Debuts E-Paper for Signage"

E-Ink has been king of e-paper displays for several years, but this startup claims to have their own proprietary implementation. Instead of aiming for the e-reader market, Altierre is concentrating on all types of signage, with the advantage of e-paper consuming zero power, compared to LCDs, except when their display is being changed: R. Colin Johnson



Here is what EETimes says about e-paper signage: Altierre Corp. today debuted a new e-paper for signage applications, offering customers the opportunity to take advantage of wireless updates using Altierre's E-Paper digital display technology for shelf labels, price tags and other commercial signage. Based on a proprietary electrophoretic technology, Altierre's E-Paper can handle bit-mapped graphics as well as text in a variety of colors. The company claims to have over 1,000 stores already using its wireless infrastructure for LCD displays, which will also be compatible with its new higher-end E-Paper based signage technology...
Further Reading

#MEMS: "6-axis Combo Chip Adds Motion Engine

Invensense was first to combine an accelerometer and a gyroscope into a single micro-electro-mechanical system (MEMS) chip, followed by STMicroelectronics and Bosch. Now ST has announced its second-generation device just slightly larger that the second-generation Invensense model announced last week. Samsung is already using ST's first generation combo MEMS, but many more will likely follow in 2013 as the advantages of a single-chip solution--smaller size and lower power--become obvious to original equipment manufacturers (OEMs): R. Colin Johnson



Here is what EETimes says about ST's combo MEMS chip: The volume of STMicroelectronics’ latest 6-axis MEMS chip has been halved and the device adds programmable motion sensing engines. ST’s iNEMO inertial module, the LSM330, combines a 3-axis accelerometer, 3-axis gyroscope and two programmable state machines for gesture recognition. ST supplies the inertial sensor for Apple's iPhone and iPad, both of which use separate accelerometer and gyroscope chips. Samsung was recently found to have switched to ST's LSM330DLC 6-axis combo chip for its Galaxy S III GT smartphone. The LSM330, successor to the LSM330DLC, measures just 3 x 3.5 mm.
Further Reading

#ENERGY: "Paper that Glows Offers Self-Illuminated Media"

Future lighty-emitting-diode (LED) lamps could be built right into the piece of paper you are reading, according to researchers at Linkoping University (Sweden). The technique grows white LEDs, made from zinc oxide and a conducting polymer, directly inside a piece of paper: R. Colin Johnson


Zinc oxide is an n-type semiconductor for the LED's substrate with p-type copper oxide for connecting to its surface electrode.

Here is what Linkoping University says about white paper LEDs: Imagine a white luminous curtain waving in the breeze. Or wallpaper that lights up your room with perfect white light. In his doctoral thesis, Gul Amin shows how white LEDs can be manufactured directly on paper.

Gul Amin, who recently received his doctorate at the Physical Electronics and Nanotechnology group, Campus Norrköping, shows in his thesis how it is possible to grow white LEDs, made from zinc oxide and a conducting polymer, directly on a piece of paper. He also shows how they can be printed onto wallpaper, for example - a method with a patent pending.

His research colleague, Naved ul Hassan Alvi, looked at his thesis from last summer at various methods for producing - growing - different nanostructures of zinc oxide on a number of different semiconducting materials.

Nanostructures of zinc oxide have a number of characteristics that make them suited to the manufacture of white LEDs - among them a large band gap and electrons that move easily and give off relatively large amounts of energy once they have bounced back towards the nucleus. Plus the fact that the energy is emitted as perfect white light.

Gul Amin has now gone further and succeeded in growing white LEDs directly on paper. The active components are nanothreads of zinc oxide on a thin layer of polydiethylflourene (PFO), a conducting polymer. But the paper has first been coated with a thin, water-repellent, protective and levelling layer of cyclotene, a resin.

“This is the first time anyone has been able to build electronic and photonic inorganic semiconducting components directly on paper using chemical methods,” says professor Magnus Willander, who is leading the research.

The article has been published in Wiley’s physica status solidi - Rapid Research Letters.

In one of the thesis’ other articles, published in Springer’s Journal of Material Science, Gul Amin also shows how it is possible to grow nanothreads on paper, blow them off the surface using ultrasound and collect them in the form of a powder.

This powder can then be used to print the nanothreads of zinc oxide, and thus LEDs, on paper or plastic in a normal printing press. That method also has patents pending, with an application by Gul Amin along with the Ecospark firm, founded by Magnus Willander, and Acreo.

Since zinc oxide is a natural semiconductor of the n type (surplus negative charge), which is due to defects in the material, Gul Amin also combined zinc oxide with copper oxide, which is of the p type (surplus positive charge), to create a few different types of electrochemical sensors.

Following his doctorate, Gul Amin returned to his native Pakistan to pursue his research, but at the Physical Electronics and Nanotechnology group the potential of zinc oxide is being further explored, in combination with graphene, copper oxide and other materials.
Further Reading

#MEMS: "Gravity Sensors to be Self-Calibrating"

Future gravity sensors will make possible altimeters without barometric pressure sensors, by using 10-times more sensitive micro-electro-mechanical systems (MEMS) that are self-calibrating. MEMS devices usually have to be calibrated at the factory, to insure that they respond in precisely the same way as all the other chips of the same type. But now an accurate, precise, and repeatable self-calibrating technique has been demonstrated that measures planar gaps with a comb drive, but which could also measure other properties such as displacement, force, stiffness or mass with 10-times more precision--enough to create gravity meters that measure your precise distance from the center of the Earth: R. Colin Johnson



With self-calibrating MEMS an on-chip or off-chip electrical probe applies enough voltage to close two unequal gaps with a comb drive while measuring the resulting changes in capacitance. (Purdue University Birck Nanotechnology Center image/Jason Vaughn Clark)

Here is what Purdue says about self-calibrating MEMS: Researchers have demonstrated tiny machines that could make possible super-accurate sensors and motors, with far-reaching applications from computer storage to altimeters, detecting petroleum deposits to measuring DNA-binding forces.

The machines are called self-calibratable micro-electromechanical systems, or MEMS. Although MEMS are in commercial use, the new device is the first of its kind capable of self-calibration, a step critical for applications requiring high performance and accuracy, said Jason Vaughn Clark, an assistant professor of electrical and computer engineering and mechanical engineering at Purdue University.

"Self-calibration is needed because each MEMS device is slightly different due to variations that occur in manufacturing," he said. "Small variations in microstructure geometry, stiffness, and mass can significantly affect performance. Because of this variability, no two MEMS behave identically. Since conventional methods to measure MEMS properties are usually impractical, expensive, have unknown accuracy and large uncertainty, enabling MEMS to calibrate themselves is a game-changing innovation."

Clark previously developed the self-calibration theory. He and doctoral student Fengyuan Li have now created the device and conducted experiments to validate the theory. Findings are detailed in a paper to appear later this year in the IEEE Journal of Microelectromechanical Systems, or JMEMS.

The peer-reviewed work received a grade of A for "innovation" and an A for "importance to the field," which testifies to the significance of the research, Clark said.

"I think it's important to note that in 1990 MEMS pioneer Richard Muller said research on the mechanical properties of the materials in these devices is needed to provide the engineering base that will make it possible to exploit fully this technology," he said. "And during a 2007 visit to Purdue, physics Nobel laureate John Hall said that without accurate and precise measurements, no reliable form of science or engineering is possible."

The self-calibrating technology makes it possible to accurately measure displacement, or how far a measuring device moves, on a scale of micrometers to less than a nanometer - a range that spans a fraction of the diameter of a human hair to a fraction of the width of an atom.

"The difficulty in accurately measuring small displacements represents a bottleneck in MEMS and nanotech advancements," Clark said. "Accurate metrology is a problem that has eluded researchers since the beginning of MEMS and nanotech in the late 1980s. Displacement is fundamental to science and engineering. We know that quantities like velocity, acceleration, force, stiffness, frequency, and mass can be related to displacement. Now, using a $15 chip that can fit on your fingertip, we showed that our technology is able to measure MEMS displacements better than a $500,000 electron microscope."

Introducing accurate measurement methods made the difference between alchemy and chemistry about 230 years ago, and self-calibrating MEMS might bring a similar transformation in the world if nanotechnology, he said.

"The ability to perform accurate measurements is of paramount importance to technological advancement," he said. "In the late 1700s, Antoine Lavoisier transformed alchemy to chemistry by introducing quantitative measurements. Today, some compare the state of micro and nanotechnology to alchemy, where nanotechnologists can precisely sense small signals, but they have not had a practical way to accurately measure most mechanical quantities. That is, no two nanotechnology labs have been able to show that they can measure the same phenomenon and obtain the same numerical result."

The heart of the self-calibrating MEMS are two gaps of differing size, electrostatic sensors and tiny actuators called comb drives, so named because they contain meshing comb-like fingers. These meshing fingers are drawn toward each other when a voltage is applied and return to their original position when the voltage is turned off. The comb drives measure the change in an electrical property called capacitance while gauging the distances of the two gaps built into the device. The fine measurements reveal the difference between the device's designed layout and the actual dimensions.

"Once you learn the difference between layout and fabrication, you have calibrated the device," Clark said. "Many MEMS designs with comb drives can be easily modified to implement our technology. Our research results suggest the days of inaccurate micro and nano-mechanical measurements are numbered."

MEMS accelerometers and gyroscopes currently are being used commercially in products such as the Nintendo Wii video game, iPhone, automobiles, the Segway human transporter and walking robots. However, those MEMS don't require ultrahigh accuracy like those used in tactical- and navigation-grade inertial sensors, which must undergo a complex calibration procedure in the factory. The chips are tested using machines that translate, rotate, shock, and heat the devices.

"The new self-calibratable MEMS could eliminate or reduce the need for rigorous factory calibration, cutting manufacturing costs," Clark said. "Something like 30 percent of manufacturing costs are related to calibration."

The self-calibratable MEMS could lead to high-performance data storage technologies and advanced lithography to create next generation computer circuits and nanodevices.

Researchers will use the new self-calibration approach to improve the accuracy of atomic force microscopes, or AFMs, which are tools essential for nanotechnologists. Purdue operates about 30 AFMs, and Clark's research group will use the calibrated MEMS to calibrate AFM displacement, stiffness, and force.

The group also will use a calibrated MEMS to measure the difference in gravity between different heights above the ground. The ability to measure gravity with such sensitivity could be used as a new tool for detecting underground petroleum deposits.

"Conventional gravity meters can cost over $200,000," Clark said. "They consist of a large vacuum tube and a mirrored mass. Gravitational acceleration is determined by measuring the drop time of the mass in free fall. Since oil or mineral deposits have a different density than surrounding material, the local gravity is slightly different."

The bulky and expensive gravity meters could be replaced with a small and inexpensive MEMS chip. Another potential application is as an altimeter for aircraft. Conventional altimeters measure height by using air pressure, which fluctuates.

"These altimeters aren't really accurate," Clark said. "Having a sensor that could accurately determine height would be an asset while flying at night, through fog, or bad weather.

The self-calibratable technology also could allow MEMS to recalibrate themselves after being exposed to harsh temperature changes or remaining dormant for long periods.

Yet another potential application is the study of exotic phenomena such as forces between molecules and within tiny structures on the scale of nanometers.

"A more accurate MEMS device could make it possible to measure physical phenomena that have been beyond the resolution of conventional technology," Clark said. "To fully understand and exploit the attributes of the nanoscale, you really have to be able to accurately measure subtle phenomena. Without accurate measurement tools, it becomes difficult to discover or resolve these phenomena, to develop accurate physical models, and to subsequently use the models to explore possibilities leading to useful innovations."

The work is based at the Birck Nanotechnology Center in Purdue's Discovery Park. The research is funded by the National Science Foundation.
Further Reading

#MEMS: "Six-axis MEMS sets new size/power low"

Smartphones and tablets today all have at least two MEMS chips in them--an accelerometer to switch screen orientation from portrait to landscape and a gyroscope to track motion for gaming and gesture recognition. The iPhone and iPad both use separate MEMS chips from STMicroelectronics for these functions, but Bosch Sensortec introduced a combo chip with both in the same package earlier this year. InvenSense, on the other hand, has had such a combo chip in production since 2010--they were probably just not chosen by Apple because they were still a privately owned startup. Since them Invensense has gone public, and now it has one-upped its rivals by downsizing the power consumption and the size of its latest six-axis combo accelerometer/gyroscope chip. No guarantee Apple will bite this time either, but many other smartphone and tablet makers have already chosen InvenSense and will welcome this smaller, lower-power combo MEMS: R. Colin Johnson


InvenSense's world's smallest lowest power six-axis MEMS combo chip combines a three-axis accelerometer with a three-axis gyroscope including on-chip sensor fusion using its digital motion processor.

Here is what EETimes says about Invensense: The latest six-axis MEMS combo chip combining a three-axis accelerometer and three-axis gyroscope from Invensense Inc. (Sunnyvale, Calif.) sets a new low in size and power.

In 2010 Invensense announced the world's first six-axis accelerometer/gyroscope combo chip—the MPU-6000—which measured 4-by-4 millimeters, but earlier this year Bosch Sensortec announced a six-axis combo chip that measured 3-by-4.5 millimeter (16 percent smaller than MPU-6000). Also last year, STMicroelectronics—supplier of accelerometers and gyroscopes for Apple's iPad and iPhone announced a six-axis combo chip but it measured 4-by-5 millimeter (25 percent bigger than MPU-6000). Invensense's latest six-axis combo chip now sets a new low, making it the undisputed smallest-size award winner by measuring just 3-by-3 millimeters. Invensense also lays claim to the lowest power consumption, by virtue of eliminating the need for a three-volt power supply to its MEMS devices, there by running the whole chip off a power saving 1.8 volts.


InvenSense uses a proprietary process that wafer bonds its ASIC holding CMOS circuitry to the MEMS wafer holding the mechanical parts before dicing, enabling the industry's only true single-chip combo.

Invensene also claims that by boosting the performance of its MEMS elements, which are wafer bonded to the ASIC holding the DMP and other CMOS circuitry using a proprietary process (see figure above), it is targeting next-generation high-performance location-based services, such as pedestrian navigation and context-aware advertising.
Further Reading

#CHIPS: "Massive Multi-Core Xeon Phi Inherits Proven Ring Topology"

Many startups have crafted massive multi-core processors as a solution to the inability to crank chip clock speeds much past 3GHz due to overheating problems, such as Tilera which has a 64-core processor that uses a proprietary instruction set. Also graphics coprocessor makers, notably Nvidia, are putting hundreds of tiny cores on their graphics-processing-units (GPUs) but which also use a proprietary instruction set. The difference with Intel's Xeon Phi is that the cores are all x86 compatible, allowing the same multiprocessing software development already in place to harness a massively parallel processor. Intel is packing every trick it knows about accelerating parallel processing into its many integrated core (MIC) architecture for the Xeon Phi, but all use technologies already proven out in Intel's existing processor families, making Intel's solution a single-chip-supercomputer that can be harnessed by any server or workstation already using Xeons: R. Colin Johnson


The Knights Ferry MIC architecture board housed this 32-core Aubrey Isle processor, the forerunner of the 50-core Xeon Phi, to be available on Knights Corner boards this fall. Source: Intel

Here is what Go-Parallel says bout Intel's Xeon Phi: Intel’s Xeon Phi – its first commercial Many Integrated Core (MIC) processor officially due out this fall – promises to bring massive multiprocessors down from the lofty heights of world-class supercomputers to the domain of enterprise servers and workstations. By installing 50-core Xeon Phi processors on Knight’s Corner PCIe 3.0 boards, any Xeon-based server or workstation will be able to access the teraFLOPS performance levels previously only available to government labs and well-endowed corporate researchers.



If we look inside the Xeon Phi, however, we do not find exotic, untested technologies like those that have drained the R&D budgets of rival multiprocessor startups, but leading-edge semiconductor processes and architectural features that already have been proven out by existing Intel multi-core processors. Intel’s latest 22-nanometer CMOS process – the Ivy Bridge die shrink of its proven Sandy Bridge microarchitecture – uses its pioneering 3-D FinFET transistors that already have put Intel years ahead of its semiconductor rivals worldwide. But just as important to the Xeon Phi’s performance is its use of the high-speed ring architecture, which had already been perfected for Intel’s second-generation Core processors and serves as the backbone of its latest multi-core Xeon processors...
Further Reading

#SPACE: "Dark Matter Mapped for First Time"

Dark matter has been observed for the first time by scientists at the University of Michigan in cooperation with the Kavli Institute for Particle Astrophysics and Cosmology at Stanford University; Ohio University; Max Planck Institut für extraterrestrische Physik in Germany; The University of Edinburgh and the University of Oxford. By imaging the gravitational lensing effects from distant galaxies the researchers were able to "see" vast filaments of dark matter connecting the visible universe to an unseen realm which makes up over 80 percent of the matter in the Universe: R. Colin Johnson



A filament of dark matter has been directly detected between the galaxy clusters Abell 222 and Abell 223. The blue shading and yellow contour lines represent the density of matter. Image credit: Jörg Dietrich, U-M Department of Physics

Here is what the University of Michigan says about dark matter: Scientists have, for the first time, directly detected part of the invisible dark matter skeleton of the universe, where more than half of all matter is believed to reside.

The discovery, led by a University of Michigan physics researcher, confirms a key prediction in the prevailing theory of how the universe's current web-like structure evolved.

The map of the known universe shows that most galaxies are organized into clusters, but some galaxies are situated along filaments that connect the clusters. Cosmologists have theorized that dark matter undergirds those filaments, which serve as highways of sorts, guiding galaxies toward the gravitational pull of the massive clusters. Dark matter's contribution had been predicted with computer simulations, and its shape had been roughed out based on the distribution of the galaxies. But no one had directly detected it until now.

"We found the dark matter filaments. For the first time, we can see them," said Jörg Dietrich, a physics research fellow in the University of Michigan College of Literature, Science and the Arts. Dietrich is first author of a paper on the findings published online in Nature and to appear in the July 12 print edition.

Dark matter, whose composition is still a mystery, doesn't emit or absorb light, so astronomers can't see it directly with telescopes. They deduce that it exists based on how its gravity affects visible matter. Scientists estimate that dark matter makes up more than 80 percent of the universe. To "see" the dark matter component of the filament that connects the clusters Abell 222 and 223, Dietrich and his colleagues took advantage of a phenomenon called gravitational lensing.

The gravity of massive objects such as galaxy clusters acts as a lens to bend and distort the light from more distant objects as it passes. Dietrich's team observed tens of thousands of galaxies beyond the supercluster. They were able to determine the extent to which the supercluster distorted galaxies, and with that information, they could plot the gravitational field and the mass of the Abell 222 and 223 clusters. Seeing this for the first time was "exhilarating," Dietrich said.

"It looks like there's a bridge that shows that there is additional mass beyond what the clusters contain," he said. "The clusters alone cannot explain this additional mass," he said.

Scientists before Dietrich assumed that the gravitational lensing signal would not be strong enough to give away dark matter's configuration. But Dietrich and his colleagues focused on a peculiar cluster system whose axis is oriented toward Earth, so that the lensing effects could be magnified.

"This result is a verification that for many years was thought to be impossible," Dietrich said.

The team also found a spike in X-ray emissions along the filament, due to an excess of hot, ionized ordinary matter being pulled by gravity toward the massive filament, but they estimate that 90 percent or more of the filament's mass is dark matter.

The researchers used data obtained with the Subaru telescope, operated by the National Astronomical Observatory of Japan. They also used the XMM-Newton satellite for X-ray observations. This work is funded by the National Science Foundation and NASA. Other contributors are from the Kavli Institute for Particle Astrophysics and Cosmology at Stanford University; Ohio University; Max Planck Institut für extraterrestrische Physik in Germany; The University of Edinburgh and the University of Oxford.
Further Reading

#CHIPS: "Memristor Fits on a Single Molecule"

A single-molecule memristor has been demonstrated by the Karlsruhe Institute of Technology (KIT). A single iron atom was surrounded by a polymer shell, resulting in a single-atom memristor on which magnetic spin states could also be encoded. The breakthrough could lead to single molecule memories that vastly increase the storage density over current day devices: R. Colin Johnson




Using a scanning tunneling microscope tip, defined electricity pulses were applied to the molecule, which switches between different magnetic states. (photo: CFN/KIT)

Here is what KIT says about its single-molecule memristor: One bit of digital information stored on a hard disk currently consists of about 3 million magnetic atoms. Researchers from Karlsruhe, Strasbourg, and Japan have now developed a magnetic memory with one bit per molecule. By an electric pulse, the metal-organic molecule can be switched reliably between a conductive, magnetic state and a low-conductive, non-magnetic state. This novel correlation for molecules is now reported in the Nature Communications journal. (doi: 10.1038/ncomms1940)

“The superparamagnetic effect prevents smaller bit sizes from being reached in a hard disk,“ explains Toshio Miyamachi, first author of the study and researcher at the Center for Functional Nanostructures (CFN) of Karlsruhe Institute of Technology (KIT). This super-paramagnetic effect implies that magnetic memory crystals are increasingly susceptible to thermal switching with decreasing size. Consequently, information may soon be lost. “We chose another approach and placed a single magnetic iron atom in the center of an organic molecule consisting of 51 atoms. The organic shell protects the information stored in the central atom.”

Apart from the ultimate density of one bit per molecule, this type of memory based on so-called spin crossover molecules also has the advantage of the writing process being reliable and purely electric.

“Using a scanning tunneling microscope, we applied defined electricity pulses to the nanometer-sized molecule,” adds Wulf Wulfhekel, head of the research group at KIT’s Physikalisches Institut. “This reproducibly changes not only the magnetic state of the iron, but also the electric properties of the molecule.” Hence, the two magnetic configurations lead to varying conductances, such that the magnetic state of the molecule can be determined easily by a simple resistance measurement.

The present study reports the fundamentals and shows the principle feasibility and advantages of memories consisting of spin crossover molecules.

“These memristive and spintronic properties combined in a molecule will open up a new field of research,” the researchers are convinced. Memristors are memories that store information in the form of resistance variations. Spintronics uses the magnetic spin of individual particles for information processing.

Work was carried out at the laboratories of the Center for Functional Nanostructures (CFN) of KIT, the Institut de Physique et Chimie des Matériaux (IPCMS) in Strasbourg, the SOLEIL synchrotron in Paris, and the Chiba University, Japan.
Further Reading

#ENERGY: "Solar Fabric Turns Clothing in to Charger"

Recharging the batteries in our mobile devices could become automatic if Exotic Solar's graphene-laced flexible polymer fabrics catch on. Exotic Solar's PowerCloth can harvest light to produce electricity for any standard five-volt battery recharger: R. Colin Johnson



“PowerCloth 1G” developed by Exotic Solar team is a light-weight, flexible, foldable and washable solar fabric that can be attached to our outfits to turn them into a 5 Volt charging port. Photo Credit: Courtesy of Exotic Solar LLC.

Here is what Exotic Solar says about its solar fabric: Exotic Solar LLC, a Salt Lake City based renewable energy company (www.exoticsolar.com), announced that they have developed a technique to manufacture cheap, flexible and foldable solar panel fabric that can be integrated with our day to day attire to make them a power source. Their patent pending technique converts brittle and fragile solar cells into flexible solar panels.

“Sun gives us tremendous amount of energy every day. If we can convert even a tiny part of that into useful electricity, it will fulfill all our electricity needs. This is the promise, riding on which photovoltaic industry has emerged as one of the fastest growing industry in the world” said Exotic Solar’s CEO Surabhi Pandey.

Apart from being the cleanest and the greenest source of electricity, the other fascinating aspect of solar technology is that it is an off-grid source of electricity. In other words, every home can have its own solar power station without any need for power cables spread all over the country.

“However, the electricity generated by solar panels installed in our homes cannot be used when we are away from home, biking, walking, boating or trekking on the mountains” said Exotic Solar’s Vice President and CBDO Vini Joseph. “An ultimate possibility in this regard is that if our apparels themselves become solar panel”.

Dr. Ashutosh Tiwari, Professor of Nanotechnology and CTO at Exotic Solar, said “presently, silicon is considered as the industry standard semiconductor for fabricating solar cells. Silicon based solar cells give >15% efficiency, are very stable and reasonably inexpensive. However, these solar cells are brittle and very fragile. As a result these need to be protected inside metallic frames, which make them very heavy”. For the application of solar cells in apparel, these cells need to be light weight, flexible and foldable.”

In Exotic Solar’s technology, high efficiency solar cells are miniaturized and strengthened using ultra-light fiberglass and graphene and then embedded in a soft polymer matrix to render them flexible. Resulting solar fabric is robust, very flexible, light weight and can be used in variety of different ways.
More information about Exotic Solar can be obtained by visiting: www.exoticsolar.com.
Further Reading

#ALGORITHMS: "Sensor Fusion Hubs Arrive"

Sensor fusions allows the accelerometers, gyroscopes, magnetometers, altimeters, temperature and proximity sensors in modern smartphones to be used together to analyze, auto-calibrate and cross-compensate for errors in raw outputs from each MEMS device. Motion-aware and location-based applications can use a sensor-fusion hub, which has its own independent "brain," to supply the application processor with total situational awareness--such as allowing the main app processor to turn itself off until a relevant event is sensed by the hub: R. Colin Johnson


MotionCore sensor fusion algorithms analyzes raw data outputs from accelerometers, gyroscopes, magnetometers, pressure-, and temperature-sensors (A, G, M, P, T, respectively) to off-load the MotionApps running on the application processor system-on-chip (SoC).

Here is what EETimes says about sensor fusion: An expanding suite of algorithms for fusing the outputs from Xtrinsic family of MEMS chips is designed to enable designers to develop sensor fusion algorithms from Freescale Semiconductor application notes or to license a sensor-hub software solution from motion algorithm specialists Movea Inc...Freescale if offering an expanded sensor toolbox for a fee, and engineers can also license a sensor hub solution from Movea that off-loads the application processor by running core algorithms on a separate Freescale ColdFire microcontroller...Movea is co-marketing its MotionCore sensor fusion platform with Freescale for use with its Coldfire microcontrollers, said Tim Kelliher, director of customer solution architectures at Movea (Pleasanton, Calif.) "By incorporating sensor fusion into our separate hub, instead of running sensor fusion algorithms on the application processor, designers can create motion-aware applications that are agnostic to hardware," Kelliher added in a statement.
Further Reading

#ALGORITHMS: "Search Engines Melding with Sensor Nets"

The European Union is funding a new project to allow world citizens to search the emerging wireless sensor networks called the "Search engine for MultimediA enviRonment generated contenT." The SMART effort is smarter than its acronym, promising to allow anyone to ask questions like “Which places are crowded?” after a soccer game, or even “Where are riots and fights happening?” as well as more traditional sensor-related searches like "Where is the live music going on that my friends are attending?": R. Colin Johnson


The goal of the Intelligent Fusion Manager is to reason for events and provide them in the form of collection files to be indexed by the search engine.

Here is what SMART says about its sensor node search engine: The Future Internet will include a large number of internet-connected sensors (including cameras and microphone arrays), which provide opportunities for searching and analyzing large amounts of multimedia data from the physical world, while also integrating them into added-value applications. Despite the emergence of techniques for searching physical world multimedia (including the proliferation of participatory sensing applications), existing multimedia search solutions do not provide effective search over arbitrary large and diverse sources of multimedia data derived from the physical world.

SMART will introduce a holistic open source web-scale multimedia search framework for multimedia data stemming from the physical world. To this end, SMART will develop a scalable search and retrieval architecture for multimedia data, along with intelligent techniques for real-time processing, search and retrieval of physical world multimedia. The SMART framework will boost scalability in both functional and business terms, while being extensible in terms of sensors and multimedia data processing algorithms. The SMART framework will enable answering of queries based on the intelligent collection and combination of sensor generated multimedia data, using sensors and perceptual (A/V) signal processing algorithms that match the application context at hand.

This matching will be based on the sensors’ context and metadata (e.g., location, state, capabilities), as well as on the dynamic context of the physical world as the later is perceived by processing algorithms (such as face detectors, person trackers, classifiers of acoustic events and components for crowd analysis). At the same time, SMART will be able to leverage Web2.0 social networks information in order to facilitate social queries on physical world multimedia. The main components of the SMART search framework will be implemented as open source software over the Terrier open source engine.
Further Reading

#CHIPS: "Intel versus ARM: Goliath Still Looming Over David"

ARM has made so many microprocessor converts that some analysts are getting the religion too, but Intel is still mammoth in comparison. For instance, ARM reported about $700 million in sales last year which is pocket change for Intel. In addition, ARM's most powerful CPU is not even an match for Intel's low-end Atom. What ARM has done, on the other hand, is unify a field of diverse embedded processors behind a single instruction set, which will be good news for designers trying to shorten their time-to-market and bill-of-materials what with all the chip makers offering ARM cores on their microprocessors and micro-controllers today: R. Colin Johnson


ARM's latest logo betrays its world domination aspirations, albeit with an IP business model that has a long ways to go to rival Intel.

Here is what EETimes says about ARM versus Intel: What with AMD, Apple, Dell, Dialog, Freescale, Fujitsu, HP, LSI, Microsoft, Motorola, MStar, Nvidia, Qualcomm, Samsung, STMicroelectronics and Texas Instruments all licensing ARM cores for everything from smartphones to tablets to basestations to servers, one might be led to believe the boast of ARM CEO Warren East that designers are choosing ARM because it is a no brainer.

The truth is that even though ARM is gaining market share in low-power embedded applications the company still has a long way to go to challenge the perennial microprocessor kings; that software compatibility hurts ARM as much as it helps; and that there are many vertical markets which will remain inaccessible to ARM cores merely because they are standardized.

Intel in particular has a 20-year head start over ARM, resulting in a maturity, sophistication and veneration that will be hard to displace by a 12-year-old. Intel's ecosystem of support chips, subsystems and software is unparalleled in the industry and addresses many more real-world issues than the low-power and small die size that makes ARM a no-brainer for many new designs. From the mobile space where Atom offers x86 compatibility that even ARM's most sophisticated cores cannot match, to the server space where Intel's Xeon already solves the most vexing issues facing datacenters today, Intel versus ARM remains a brain-teaser. For instance, the fast-growing cloud computing space uses virtualization to offer mobile device users access to applications running on servers for which Intel has a top-to-bottom solution – VTx – which securely links x86-based mobile devices with Xeon-based cloud computers. ARM, on the other hand, is still pursuing virtualization extensions that could offer similar integration of mobile devices into cloud computing realms...
Further Reading

#MEMS: "HP Updates Progress on Memristor"

Stan Williams, an HP Senior Fellow, participated in a panel discussion about how nanotechnology is changing the course of computing sponsored by The Kavli Foundation. The ensuing discussion was broad and not so deep, but did reveal some of the progress that HP is making with Hynix Semiconductor to commercialize the memristor: R. Colin Johnson


Stan Williams, Hewlett-Packard Senior Fellow and director of the company's Cognitive Systems Laboratory.

Here is what the The Kavli Foundation says about its panel discussion: Most news stories focused on the miniscule size of these new devices, and how they might keep Moore's Law (which states that shrinking chip device size doubles computing power every 18 months) hurtling through the next decade or two.
Yet there is another story here: These breakthroughs show how, after more than a decade of research advances, scientists and technologists are learning to measure and manipulate matter to create fundamentally different electronic devices.

The Kavli Foundation brought together three experts to discuss what makes those devices unique, how nanotechnology is likely to affect computing, and whether we have the research infrastructure necessary to commercialize today's latest nanoelectronic findings.
Michelle Simmons, Scientia Professor and Director of the Australian Centre of Excellence for Quantum Computation and Communication Technology, University of New South Wales. She recently demonstrated single-atom transistors and 4-atom-wide nano wires.

Paul Weiss, Kavli Professor at UCLA and Director of the California NanoSystems Institute. The Institute's goals are to advance and speed the commercialization of nanotechnology.
Stan Williams, Hewlett-Packard Senior Fellow and director of the company's Cognitive Systems Laboratory. He is currently supporting efforts to manufacture mass-market memristor-based memory, build extremely large and sensitive sensor networks, and develop nanoscale devices that manipulate light
Further Reading

#SECURITY: "Cheap Handheld Terahertz Scanners on Horizon"

Today the terahertz full-body scanners at airports are big, heavy and expensive, relegating their use to applications with plenty of space and funding. However, if inexpensive CMOS chip-sized terahertz emitters and detectors can be perfected then the size and price of terahertz scanners can be brought down. The result would be cheap handheld scanners that would virtually obsolete X-rays for dentistry, medical and any other applications where people are involved, since terahertz rays do the same job but are safer than X-rays: R. Colin Johnson


The world's first phase-locked loop for a CMOS terahertz emitter harnesses 45-nm process with on-chip antenna.

Here is what EETimes says about cheap handheld terahertz scanners: Millimeter wavelength alternatives to traditional X-rays are already using terahertz-range frequencies to safely scan passengers, luggage and cargo at airports, albeit using bulky discrete devices. Silicon-based terahertz range emitters and detectors could downsize millimeter wave devices for a wide variety of applications beyond airport security, including safer medical imaging along with industrial and environmental applications aimed at detecting hazardous substances.

Earlier this year, Semiconductor Research Corp. (SRC, Research Triangle, N.C.) sponsored research demonstrating a CMOS detector operating in the terahertz range. Now, Texas Instrument's has demonstrated a companion terahertz-range emitter created in cooperation with the SRC-sponsored Texas Analog Center of Excellence at the University of Texas at Dallas. TI's terahertz-range emitter uses a phase-locked loop (PLL) to stabilize its frequency, a necessity for making millimeter wavelength systems in CMOS commercially feasible.
Further Reading