As the first member of its Many Integrated Core (MIC) architecture, Intel's Xeon Phi coprocessor board makes use of its 22-nanometer 3-D Tri-gate transistors. Source: Intel
The Department of Energy (DOE) announced a $19 million award to Intel Federal to develop exascale processors, next-generation memories, and ultra-fast input/output (I/O) technologies for Lawrence Livermore National Security’s (LLNS’s) Extreme-Scale Computing Research and Development “FastForward” program.
By enlisting broad cooperative contributions from industry, academia, and other national laboratories, DOE’s LLNS aims to develop all the necessary high-performance computing (HPC) capabilities needed to achieve exascale systems by 2020...Intel Federal’s twofold contract will apply the whole range of Intel’s capabilities, from basic research to development to prototyping to systems integration. Besides its MIC architecture and Xeon Phi massively parallel coprocessors, Intel also will enlist its 3-D memory technology developed with Micron Technology, called the Hybrid Memory Cube, as well as its high-speed interconnect technologies acquired earlier this year: Infiniband’s switched fabric network acquired from QLogic, and the Gemini interconnect technology acquired from Cray.
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