Thursday, December 09, 2010

#3D: "Startup hawks monolithic 3-D chips"

True monolithic three-dimensional (3-D) silicon chips will beat die stacked with through-silicon-vias (TSVs) by a factor of 10,000 in connectivity, according to serial entrepreneur Zvi Or-Bach who spoke at the 3-D Architectures for Semiconductor Integration and Packaging conference in Burlingame, Calif. Look for monolithic 3D chips to nip TSVs in the bud for some applications in 2012 and beyond. R. Colin Johnson, Kyoto Prize Fellow @NextGenLog

The simplest way to create 3-D chips is to fabricate the bottom chip as usual, cover it with oxide, then bond it to a similarly oxide clad giant-transistor donar chip, which can then be etched into individual transistors.

According to Or-Bach, NuPGA's 3-D IC fabrication techniques can be used to stack memory on top of a processor, to stack bit-wide memory chips into byte-wide configurations or just to shrink the die of existing designs by optimizing chip area versus height. Any number of chip layers can be composed, according to Or-Bach, enabling general-purpose monolithic 3-D to reduce chip areas by as much as three times over conventional 2-D.
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